It is known that in modern data processing systems high capacity random access dynamic memories are widely used, having a high capacity of the order of tens and even hundreds of MegaBytes.
These memories are generally structured in modular banks, or simply modules, individually accessible in such a way as to be able to operate in temporal overlap with one another and generally to achieve a data processing capacity (throughput) adequate for the requirements of modern data processing systems, in particular multiprocessor systems which are intrinsically faster than the memories.
With particular memory module interleaving techniques it is possible to arrange that whilst a memory module performs an information reading or writing operation, controlled by a processor, the same processor or other processors can control and start other reading or writing operations in different modules, on the sole condition that the information to be read or written is resident or must be written in different modules from those already activated.
Therefore the joint or simultaneous use of several memory modules does not obey systematic criteria which can be determined a priori, but is variable in time in a probabilistic manner depending on the type of processes performed by the different processors and memory location of the data necessary for the performance of the different processes.
In practice, in order to achieve optimum performance of the data processing system, the number of memory modules is chosen in relation to the number and speed of the processors and to the speed of the memory, in such a way that the memory access times are minimised or nil.
Consequently on average only about 50% of the memory modules are contemporaneously active, and only exceptionally are all the memory modules contemporaneously active, but this possibility cannot be excluded nor its duration can be forecast.
This fact has serious implications for the power supply of data processing systems and associated processors and memory modules which, as is known, must be supplied from a regulated voltage power supply able to satisfy all the possible load conditions.
In fact, whilst processors have a relatively constant current consumption the memory modules, when inactive, have a negligible consumption whilst when active the current consumption is high and of the same order as that of the processors.
Thus, by way of indication, if a power supply is dimensioned to deliver the maximum instantaneous current required by a data processing system the current delivered when the memory is inactive can be of the order of 20% and reaches 100% only when all the memory modules are contemporaneously active, whilst normally it is of the order of 60%.
The power supply is therefore exploited far below its effective potential.
Power supplies constitute a not insignificant factor in terms of cost and size of data processing systems and it is therefore desirable to dimension them as a function of the normal load requirements, to allow an optimum use to be made of them, whilst containing possible exceptional overload conditions and their duration within predetermined limits such as not to prejudice the operation of the power supply.